Some logic-gates challenges require you to use only NAND gates to solve a problem. Usually, constructing an OR gate from NAND gates requires 3 NAND gates. However, an OR gate can also be constructed using 0 NAND gates, by simply joining 2 pieces of wire together:
A---\ ---Output B---/
Is joining 2 pieces of wire allowed or are we going to have to use NAND gates to make OR gates?